View MAX9153_135832.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-2167; Rev 0; 10/01
KIT ATION EVALU ABLE AVAIL
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive
General Description Features
o Ultra-Low 90psp-p (max) Added Deterministic Jitter at 800Mbps (223-1) PRBS Pattern o 1psRMS (max) Added Random Jitter o 60ps (max) Skew Between Channels o Guaranteed 800Mbps Data Rate o LVDS (MAX9153) or LVPECL (MAX9154) Input Versions o Fail-Safe Circuit Sets Output High for Undriven Inputs (MAX9153) o High-Impedance Differential Input when VCC = 0 o 2A Power-Down Supply Current o Conforms to ANSI/EIA/TIA-644 LVDS Standard o Pin-Compatible Upgrade to DS90LV110
MAX9153/MAX9154
The MAX9153/MAX9154 low-jitter, low-voltage differential signaling (LVDS) repeaters are ideal for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The devices accept a single LVDS input (MAX9153) or single LVPECL input (MAX9154) and repeat the signal at 10 LVDS outputs. Each differential output drives 100, allowing point-topoint distribution of signals on transmission lines with 100 termination at the receiver input. Ultra-low 90psp-p (max) added deterministic jitter and 1psRMS (max) added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing error, especially those incorporating clock-anddata recovery or serializers and deserializers. The highspeed switching performance guarantees 800Mbps data rate and less than 60ps (max) skew between channels while operating from a single +3.3V supply. Supply current at 800Mbps is 118mA and reduces to 2A in power-down mode. LVDS inputs and outputs conform to the ANSI/EIA/TIA -644 standard. A fail-safe feature on the MAX9153 sets the output high when the input is undriven and open, terminated, or shorted. The MAX9153/MAX9154 are available in a 28-pin TSSOP package and are specified for the -40C to +85C extended temperature range. Refer to the MAX9150 data sheet for a pin-compatible 10-port LVDS repeater capable of driving a double-terminated (50) LVDS link. Refer to the MAX9110/MAX9112 and MAX9111/MAX9113 data sheets for LVDS line drivers and receivers.
Ordering Information
PART MAX9153EUI MAX9154EUI TEMP. RANGE -40C to +85C -40C to +85C PINPACKAGE 28 TSSOP 28 TSSOP INPUT LVDS LVPECL
Applications
Cellular Phone Base-Stations Add/Drop Muxes Digital Cross-Connects Network Switches/Routers Backplane Interconnect Clock Distribution
TX
Typical Application Circuit
LVDS
MAX9153 MAX9154
LVDS* 100
1
100
RX
BACKPLANE OR CABLE
MAX9111
10
100
MAX9110
RX
Pin Configuration appears at end of data sheet.
*(LVPECL INPUT FOR MAX9154)
MAX9111
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +4.0V RIN+, RIN- to GND ................................................-0.3V to +4.0V PWRDN to GND..........................................-0.3V to (VCC + 0.3V) DO_+, DO_- to GND..............................................-0.3V to +4.0V Short-Circuit Duration (DO_+, DO_-) .........................Continuous Continuous Power Dissipation (TA = +70C) 28-Pin TSSOP (derate 12.8mW/C above +70C) .....1026mW Storage Temperature.........................................-65C to +150C Maximum Junction Temperature .....................................+150C Operating Temperature Range ...........................-40C to +85C ESD Protection Human Body Model (RIN+, RIN-, DO_+, DO_-) ..............8kV Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 100 1%, differential input voltage |VID| = 0.05V to 1.2V, MAX9153 LVDS input common-mode voltage VCM = |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25C.) (Notes 1 and 2)
PARAMETER CONTROL INPUT (PWRDN) Input High Voltage Input Low Voltage Input Current DIFFERENTIAL INPUT (RIN+, RIN-) Differential Input High Threshold Differential Input Low Threshold VTH VTL IRIN+, IRIN0.05V | VID | 0.6V, PWRDN = high or low (Figure 1) 0.6V < | VID | 1.2V, PWRDN = high or low (Figure 1) 0.05V | VID | 0.6V, VCC = 0 or open, PWRDN = 0 or open (Figure 1) 0.6V < | VID | 1.2V, VCC = 0 or open, PWRDN = 0 or open (Figure 1) PWRDN = high or low (Figure 1) Input Resistor 1 (MAX9153) RIN1 VCC = 0 or open, PWRDN = 0 or open (Figure 1) PWRDN = high or low (Figure 1) Input Resistor 2 (MAX9153) RIN2 VCC = 0 or open, PWRDN = 0 or open(Figure 1) VRIN+ = 3.6V, VRIN- = 3.6V or 0, PWRDN = high or low (Figure 2) VRIN+ = 0, VRIN- = 3.6V or 0, PWRDN = high or low (Figure 2) VRIN+ = 3.6V, VRIN- = 0, VCC = 0 or open, PWRDN = 0 or open (Figure 2) VRIN+ = 0, VRIN- = 3.6V, VCC = 0 or open, PWRDN = 0 or open (Figure 2) -50 -15 -20 -15 -20 103 103 154 154 -10 -10 -10 -10 3 3 3 3 10 A 10 10 A 10 k k -3 -3 -3 -4 3 4 15 A 20 15 A 20 50 mV mV VIH VIL IIN PWRDN = high or low 2.0 GND -20 VCC 0.8 20 V V A SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Current (MAX9153)
Power-Off Input Current (MAX9153)
IRIN+ (OFF), IRIN- (OFF)
Input Current (MAX9154)
IRIN+, IRIN-
Power-Off Input Current (MAX9154)
IRIN+ (OFF), IRIN- (OFF)
2
_______________________________________________________________________________________
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, RL = 100 1%, differential input voltage |VID| = 0.05V to 1.2V, MAX9153 LVDS input common-mode voltage VCM = |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25C.) (Notes 1 and 2)
PARAMETER Input Resistor 3 (MAX9154) LVDS OUTPUT (DO_+, DO_-) Differential Output Voltage Charge in VOD Between Complementary Output States Offset (Common-Mode) Voltage Change in VOS Between Complementary Output States Output High Voltage Output Low Voltage Differential Output Resistance Differential High Output Voltage in Fail-Safe VOD VOD VOS VOS VOH VOL RODIFF Figure 3 Figure 3 Figure 3 Figure 3 Figure 3 Figure 3 PWDRN = high or low VCC = 0 PWDRN = 0 or open RIN+, RIN- undriven with short, open, or 100 termination (MAX9153) RIN+, RIN- open (MAX9154) PWDRN = low; VDO_+ = 3.6V or 0, DO_- + open; or VDO_- = 3.6V or 0, DO_+ = open IOZ VCC = 0, PWRDN = 0 or open; VDO_+ = 3.6V or 0, DO_- = 3.6V or VDO_- = 3.6V or 0, DO_+ = open VID = +50mV, VDO_+ = 0 or VCC, VDO_- = 0 or VCC VID = -50mV, VDO_+ = 0 or VCC, VDO_- = 0 or VCC VID = +50mV, VOD = 0 VID = -50mV, VOD = 0 DC, RL = 100 (Figure 4) Supply Current Power-Down Supply Current ICC ICCZ 200MHz (400Mbps), RL = 100 400MHz (800Mbps), RL = 100 PWDRN = low Figure 4 (Note 3) 0.9 150 250 250 -1 238 330 450 450 1 A -1 1 1.125 250 380 1 1.26 3 450 25 1.375 25 1.6 mV mV V mV V V SYMBOL RIN3 CONDITIONS PWRDN = high or low (Figure 2) VCC = 0 or open, PWRDN = 0 or open (Figure 2) MIN 360 360 k TYP MAX UNITS
MAX9153/MAX9154
VOD+
mV
Single-Ended Output ShortCircuit Current
Single-Ended Output Short-Circuit Current Differential Output Short-Circuit Current (Note 3) SUPPLY
IOS
-15
15
mA
IOSD
-15
15
mA
70 90 118 2
95 115 145 20 A mA
_______________________________________________________________________________________
3
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 100 1%, CL = 5pF, differential input voltage |VID| = 0.15V to 1.2V, MAX9153 LVDS input commonmode voltage VCM = |VID/2| to 2.4V - |VID/2|, MAX9154 LVPECL input voltage range = 0 to VCC, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25C.) (Notes 3, 4, 5)
PARAMETER Rise Time Fall Time Added Deterministic Jitter (Note 6) Added Random Jitter (Note 6) Differential Propagation Delay Low to High Differential Propagation Delay High to Low Pulse Skew | tPLHD - tPHLD | Channel-to-Channel Skew (Note 7) Differential Part-to-Part Skew 1 (Note 8) Differential Part-to-Part Skew 2 (Note 9) Maximum Input Frequency (Note 10) Power-Down Time Power-Up Time SYMBOL tLHT tHLT tDJ Figures 4, 5 VID = 200mV, 2 - 1 PRBS data, VCM = 1.2V VID = 200mV, 50% duty cycle input, VCM = 1.2V
23
CONDITIONS
MIN 150 150
TYP 220 220 13 24
MAX 450 450 50 90 1 1
UNITS ps ps ps (p-p) ps (RMS)
400Mbps (NRZ) 800Mbps (NRZ) 200MHz 400MHz 1.6
tRJ tPLHD
2.3 2.3 27 35
3.3 ns 3.3 80 60 ps ps
Figures 4, 5 tPHLD tSKEW tCCS tPPS1 Figures 4, 5 tPPS2 fMAX tPD tPU Figures 4, 5 Figures 6, 7 800 10 20 20 40 1.7 Figures 4, 5 Figures 4, 5 1.6
1.2
ns ns Mbps ns s
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except VTH, VTL, VID, VOD, and VOD. Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production tested at TA = +25C. Note 3: Guaranteed by design and characterization. Note 4: CL includes scope probe and test jig capacitance. Note 5: Signal generator conditions unless otherwise noted: frequency = 400MHz, 50% duty cycle, RO = 50, tR = 0.6ns, and tF = 0.6ns (0% to 100%). Note 6: Device jitter added to the input signal. Note 7: tCCS is the magnitude difference in differential propagation delay between outputs for a same-edge transition. Note 8: tPPS1 is the magnitude difference of any differential propagation delays between devices operating over rated conditions at the same supply voltage, input conditions, and ambient temperature. Note 9: TPPS2 is the magnitude difference of any differential propagation delays between devices operating over rated conditions. Note 10: Device meets VOD DC specification, and AC specifications while operating at fMAX.
4
_______________________________________________________________________________________
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
Typical Operating Characteristics
(VCC = +3.3V, RL = 100, CL = 5pF, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. FREQUENCY
MAX9153/54 toc01
DIFFERENTIAL PROPAGATION DELAY vs. SUPPLY VOLTAGE
MAX9153/54 toc02
DIFFERENTIAL PROPAGATION DELAY vs. OUTPUT LOAD
DIFFERENTIAL PROPAGATION DELAY (ns) 2.45 2.40 tPLHD 2.35 2.30 2.25 2.20 2.15 2.10 50 70 90 110 130 150 tPHLD
MAX9153/54 toc03
170 160 150 SUPPLY CURRENT (mA) 140 130 120 110 100 90 80 70 10 100 INPUT FREQUENCY (MHz)
2.50 DIFFERENTIAL PROPAGATION DELAY (ns) 2.45 tPLHD 2.40 2.35 2.30 2.25 2.20 2.15 2.10 3.0 3.1 3.2 3.3 3.4 3.5 tPHLD
2.50
1000
3.6
SUPPLY VOLTAGE (V)
OUTPUT LOAD ()
DIFFERENTIAL PROPAGATION DELAY vs. INPUT COMMON-MODE VOLTAGE
MAX9153/54 toc04
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW vs. SUPPLY VOLTAGE
MAX9153/54 toc05
TRANSITION TIME vs. SUPPLY VOLTAGE
270 260 TRANSITION TIME (ps) 250 240 230 220 210 200 190 tHLT tLHT
MAX9153/54 toc06
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW (ps)
2.55 DIFFERENTIAL PROPAGATION DELAY (ns) 2.50 2.45 2.40 2.35 2.30 2.25 2.20 0 0.5 1.0 1.5 2.0 tPHLD tPLHD
35 30
H
280
B 25 20 A, F 15 D 10 E 5 3.0 3.1 3.2 3.3 3.4 3.5 G I C
2.5
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
INPUT COMMON MODE-MODE VOLTAGE (V)
TRANSITION TIME vs. OUTPUT LOAD
MAX9153/54 toc07
SUPPLY VOLTAGE (V) A = DO5 - DO1 B = DO5 - DO2 C = DO5 - DO3 D = DO5 - DO4 E = DO5 - DO6 F = DO5 - DO7 G = DO5 - DO8 H = DO5 - DO9 I = DO5 - D010 550 500 TRANSITION TIME (ps) 450 400 350 300 250 200
SUPPLY VOLTAGE (V)
TRANSITION TIME vs. LOAD CAPACITANCE
MAX9153/54 toc08
235 230 TRANSITION TIME (ps) 225 tLHT 220 215 tHLT 210 205 200 50 70 90 110 130
tLHT
tHLT 5 7 9 11 13 15
150
OUTPUT LOAD ()
LOAD CAPACITANCE (pF)
_______________________________________________________________________________________
5
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
Typical Operating Characteristics (continued)
(VCC = +3.3V, RL = 100, CL = 5pF, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, TA = +25C, unless otherwise noted.)
DIFFERENTIAL OUTPUT vs. SUPPLY VOLTAGE
MAX9153/54 toc09
DIFFERENTIAL OUTPUT vs. OUTPUT LOAD
MAX9153/54 toc10
400 398 DIFFERENTIAL OUTPUT (mV) 396 394 392 390 388 386 384 382 380 3.0 3.1 3.2 3.3 3.4 3.5
520 470 420 370 320 270 220
3.6
DIFFERENTIAL OUTPUT (mV)
50
70
90
110
130
150
SUPPLY VOLTAGE (V)
OUTPUT LOAD ()
Pin Description
PIN 1, 3, 11, 13, 16, 18, 20, 24, 26, 28 2, 4, 12, 14, 15, 17, 19, 23, 25, 27 5 6, 9, 21 10, 22 7 8 NAME DO2+, DO1+, DO10+, DO9+, DO8+, DO7+, DO6+, DO5+, DO4+, DO3+ DO2-, DO1-, DO10-, DO9-, DO8-, DO7-, DO6-, DO5-, DO4-, DO3PWRDN GND VCC RIN+ RINFUNCTION
Differential LVDS Outputs
Power Down. Drive PWRDN low to disable all outputs and reduce supply current to 2A. Drive PWRDN high for normal operation. Ground Power. Bypass each VCC pin to GND with 0.1F and 1nF ceramic capacitors. LVDS (MAX9153) or LVPECL (MAX9154) Differential Inputs. RIN+ and RIN- are high-impedance inputs. Connect a resistor from RIN+ to RIN- to terminate the input signal.
Detailed Description
LVDS is a signaling method for point-to-point data communication over a controlled-impedance medium as defined by the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. LVDS uses a lower voltage swing than other common communication standards, achieving higher data rates with reduced power consumption, while reducing EMI emissions and system susceptibility to noise. The MAX9153/MAX9154 are 800Mbps, 10-port repeaters for high-speed, point-to-point, low-power
6
applications. The MAX9153 accepts an LVDS input and has a fail-safe input circuit. The MAX9154 accepts an LVPECL input. Both devices repeat the input at 10 LVDS outputs. The devices detect differential signals as low as 50mV and as high as 1.2V within the 0 to 2.4V input voltage range as specified in the LVDS standards. The MAX9153/MAX9154 outputs use a current-steering configuration to generate a 2.5mA to 4.5mA output current. This current-steering approach induces less ground bounce and no shoot-through current, enhancing noise margin and system speed performance. The outputs are short-circuit current limited and are high
_______________________________________________________________________________________
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive
impedance (to ground) when PWRDN = low or the device is not powered. The outputs have a typical differential resistance of 238. The internal differential output resistance terminates induced noise and reflections from the primary termination located at the LVDS receiver. The MAX9153/MAX9154 current-steering output requires a resistive load to terminate the signal and complete the transmission loop. Because the devices switch the direction of current flow and not voltage levels, the output voltage swing is determined by the value of the termination resistor multiplied by the output current. With a typical 3.8mA output current, the MAX9153/MAX9154 produce a 380mV output voltage when driving a transmission line terminated with a 100 resistor (3.8mA x 100 = 380mV). Logic states are determined by the direction of current flow through the termination resistor.
MAX9153/MAX9154
VCC RIN2 COMPARATOR
MAX9153
VCC - 0.3V RIN+ RIN1/2
DO1+ DO1-
RIN1/2 RIN-
RECEIVER DO10+ DO10-
Table 1. Input/Output Function Table
INPUT, VID +50mV -50mV Open Undriven short Undriven terminated MAX9153 MAX9153 MAX9153 MAX9154 OUTPUTS, VOD High Low High High High
Figure 1. MAX9153 Input Fail-Safe Circuit
VCC RIN3 RIN+
DO1+ DO1-
Note: VID = RIN+ - RIN-, VOD = DO_+ - DO_High = 450mV > VOD > 250mV Low = -250mV > VOD > -450mV
RINRECEIVER RIN3 DO10+ DO10-
Fail-Safe
The fail-safe feature of the MAX9153 sets the outputs high when the differential input is: * Open * * Undriven and shorted Undriven and terminated
MAX9154 Figure 2. MAX9154 Input Bias Resistors
Without a fail-safe circuit, when the input is undriven, noise at the input may switch the outputs and it may appear to the system that data is being sent. Open or undriven terminated input conditions can occur when a cable is disconnected or cut, or when an LVDS driver output is in high impedance. A shorted input can occur because of a cable failure. When the input is driven with signals meeting the LVDS standard, the input common-mode voltage is less than VCC - 0.3V and the fail-safe circuit is not activated. If
the input is open, undriven and shorted, or undriven and parallel terminated, an internal resistor in the failsafe circuit pulls both inputs above VCC - 0.3V, activating the fail-safe circuit and forcing the outputs high (Figure 1). The MAX9154 is essentially the MAX9153 without the fail-safe circuit. The MAX9154 accepts input voltages from 0 to VCC (vs. 0 to 2.4V for the MAX9153), which allows interfacing to LVPECL input signals while retaining a good common-mode tolerance.
_______________________________________________________________________________________
7
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
Applications Information
Supply Bypassing
Bypass each VCC with high-frequency surface-mount ceramic 0.1F and 1nF capacitors in parallel as close to the device as possible, with the smaller value capacitor closest to the VCC pin. Termination The MAX9153/MAX9154 are specified for 100 differential characteristic impedance but can operate with 90 to 132 to accommodate various types of interconnect. The termination resistor should match the differential characteristic impedance of the interconnect and be located close to the LVDS receiver input. Use a 1% surface-mount termination resistor. The output voltage swing is determined by the value of the termination resistor multiplied by the output current. With a typical 3.8mA output current, the MAX9153/MAX9154 produce a 380mV output voltage when driving a transmission line terminated with a 100 resistor (3.8mA x 100 = 380mV).
Traces, Cables, and Connectors
The characteristics of input and output connections affect the performance of the MAX9153/MAX9154. Use controlled-impedance traces, cables, and connectors with matched characteristic impedance. Ensure that noise couples as common mode by running the traces of a differential pair close together. Reduce within-pair skew by matching the electrical length of the traces of a differential pair. Excessive skew can result in a degradation of magnetic field cancellation. Maintain the distance between traces of a differential pair to avoid discontinuities in differential impedance. Minimize the number of vias to further prevent impedance discontinuities. Avoid the use of unbalanced cables, such as ribbon cable. Balanced cables, such as twisted pair, offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver.
Chip Information
TRANSISTOR COUNT: 1394 PROCESS: CMOS
Test Circuits and Timing Diagrams
DO1+ MAX9153 MAX9154 VOD 50 50 DO150 VOS
RIN+ GENERATOR RINVOD 50 50 50
DO10+
VOS DO10-
Figure 3. Driver-Load Test Circuit
8
_______________________________________________________________________________________
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive
Test Circuits and Timing Diagrams (continued)
CL 5pF DO1+ RL 100 CL 5pF DO1-
MAX9153/MAX9154
MAX9153 MAX9154
50
RIN+ GENERATOR RIN-
CL 5pF DO10+ RL 100 CL 5pF DO10-
50
Figure 4. Propagation Delay and Transition Time Test Circuit
RIN0 RIN+ tPLHD 80% 50% 20% tLHT tHLT O VOD = (VDO_+) - (VDO_-) tPHLD 80% O 50% 20% DIFFERENTIAL VID
Figure 5. Propagation Delay and Transition Time Waveforms
_______________________________________________________________________________________
9
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive MAX9153/MAX9154
Test Circuits and Timing Diagrams (continued)
CL 5pF MAX9153 MAX9154 CL 5pF 1.05V 1.0V 1.05V 1.0V PWRDN 50 CL 5pF RIN+ RINCL 5pF DO10+ RL 50 RL 50 DO10DO1+ RL 50 RL 50 DO1-
1.2V
1.2V
GENERATOR
Figure 6. Power-Up/Down Delay Test Circuit
PWRDN 50% 50%
VCC
O tPD tPU VOH VDO_+ WHEN VID = +50mV VDO_- WHEN VID = -50mV 50% 50% 1.2V 1.2V VDO_+ WHEN VID = -50mV VDO_- WHEN VID = +50mV tPD 50% tPU 50% VOL
Figure 7. Power-Up/Down Delay Waveforms
10
______________________________________________________________________________________
Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100 Drive
Pin Configuration
TOP VIEW MAX9153 MAX9154
DO2+ 1 DO2- 2 DO1+ 3 DO1- 4 PWRDN 5 GND 6 RIN+ 7 RIN- 8 GND 9 VCC 10 DO10+ 11 DO10- 12 DO9+ 13 DO9- 14 28 DO3+ 27 DO326 DO4+ 25 DO424 DO5+ 23 DO522 VCC 21 GND 20 DO6+ 19 DO618 DO7+ 17 DO716 DO8+ 15 DO8-
MAX9153/MAX9154
TSSOP
Package Information
TSSOP,NO PADS.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
11 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX9153

	To Download MAX9153 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .